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Two-dimensional semiconductor chips: How does China's "Wuji" rewrite the final chapter of Moore's Law?

Introduction: When silicon-based chips hit the physical limit

Since Moore's Law was proposed in 1965, silicon-based chips have driven computing power growth by continuously reducing the size of transistors. However, in recent years, silicon materials have faced quantum tunneling effects and heat dissipation bottlenecks in processes below 3 nanometers. In April 2025, the world's first two-dimensional semiconductor processor "Wuji" (WUJI) published by the Fudan University team in Nature magazine set a new world record with 5,900 transistors, marking the entry of chip technology into the "post-silicon era".


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Technological breakthrough: dimensionality reduction of two-dimensional materials

1. Material revolution: from "marble" to "tofu"


Ultra-thin properties:  Two-dimensional semiconductor materials (such as molybdenum disulfide MoS₂) are only 0.7 nanometers thick, about 300 times thinner than silicon materials, with carrier mobility increased by more than 5 times and power consumption reduced by 90%.

 

Bypassing EUV lithography machines:  Traditional silicon-based chips rely on extreme ultraviolet lithography machines from ASML in the Netherlands, while two-dimensional chips use independent processes and are compatible with existing silicon-based production lines, without the need for sky-high equipment support.

 

2. Process innovation: AI-driven atomic-level manufacturing


Flexible plasma etching: Using low-energy (<5eV) etching technology to avoid damaging the material structure, the transistor leakage current is reduced to 10⁻¹²A/μm, and the yield rate reaches 99.77%.

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AI optimizes the entire process: Through 100,000 sets of process data training models, the parameter debugging time is shortened from several months to 72 hours, and atomic-level interface regulation is achieved.

 

3. Architecture autonomy: RISC-V open source ecology

Using the RISC-V instruction set, bypassing the ARM/X86 patent barriers, supporting 37 32-bit instructions for flexible configuration, and power consumption of only 0.43mW (at 1kHz frequency).

 

The team has developed 25 standard logic unit libraries, laying the foundation for the construction of a domestic chip ecosystem.

 

Application prospects: from mobile phones to deep space exploration

1. Consumer electronics revolution

Double battery life: The low power consumption characteristics of two-dimensional chips can extend the battery life of mobile phones and smart watches to 2-3 times.

 

Flexible devices: Ultra-thin materials are suitable for new terminals such as folding screens and electronic skins.

 

2. Industry and defense

Internet of things sensors: Button batteries can run for 10 years and are suitable for field environment monitoring.

 

Aerospace: Radiation-resistant version chips have passed the test and are planned to be used in lunar base control systems. The single-particle flip rate is two orders of magnitude lower than that of silicon-based chips.

 

3. New computing power paradigm

AI edge computing: Energy efficiency is improved by 5 times, suitable for scenarios such as real-time decision-making in autonomous driving and smart factories.

 

Quantum computing fusion: Two-dimensional superlattice structures may become quantum bit carriers, and related research has been launched in the Hefei laboratory.

 

Challenges and future: Three mountains and hybrid architecture

1. Industrialization barriers

Mass production problems: The uniformity of 12-inch wafers needs to reach 99.99%, and the current yield still has room for improvement.

 

Heat dissipation bottleneck: Atomic-level thin films have weak heat dissipation performance, and high-frequency computing may cause overheating.

 

2. Ecosystem construction

RISC-V ecosystem is not mature enough, and it will take time for developers to adapt tool chains and software.

 

International standard formulation: Fudan University has submitted the "Two-Dimensional Semiconductor Device Test Specification" to compete for the right to speak on technology.

 

3. Technology evolution path

Hybrid architecture: Cooperate with SMIC and Huawei to develop "two-dimensional-silicon-based" 3D stacked chips, and the system energy efficiency will be further improved by 40%.

 

Material expansion: Research and develop tungsten diselenide (WSe₂) to realize CMOS process, and it is expected that the transistor density will exceed 20,000/chip in 2026.

 

Conclusion: The logic of "changing lanes and overtaking" of Chinese chips

The breakthrough of two-dimensional semiconductor technology is not only a breakthrough in the physical limit of silicon-based chips, but also a strategic attempt to make the industry chain autonomous. Through the triple combination of "material innovation + process revolution + open source ecology", China is transforming from a "follower" to a "rule maker". Although mass production and ecological construction still need to be tackled, the "Wuji" chip has provided an oriental solution for the computing architecture of the post-Moore era - this may be the key leap for China's semiconductors to move from the laboratory to the trillion-dollar market. 


Extended reading

"Detailed explanation of two-dimensional chip manufacturing process"

"RISC-V ecological development white paper"

(Note: The technical details in the article are summarized from Fudan University papers and industry reports135)

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